Design
Visual System Simulator White Paper
End-to-end System Design: Advantages Of An Integrated Tool For Frequency Planning, Budget Analysis And More.
AWR Releases Visual System Simulator 2010
AWR Corporation, the innovation leader in high-frequency EDA, today announced the commercial release of its 2010 Visual System Simulator™ (VSS) software. The release offers new capabilities that increase productivity for RF system designers; including time delay neural network (TDNN™) advanced amplifier behavioral models for capturing memory effects and measurement data interchange format (MDIF) model support, as well as a new phased array element for radar design engineers.
Avnet Embedded Benelux seminar gives specialist insight into the latest embedded technologies
Avnet Embedded, an Avnet, Inc. (NYSE:AVT) company, is bringing its Embedded Technical Seminar to Brussels after its success in The Netherlands. In partnership with Silica, Avnet Embedded will also be joined by Alten PTS, Alten Belgium, Intel and Windows® Embedded for the one-day free of charge seminar for embedded developers being held on 21st September 2010 at the Business Faculty in Brussels.
C2000 Peripheral Explorer Kit and Free Teaching ROM give developers a head start in learning and launching real-time control applications
Giving students and new real-time control developers an easy-to-use, cost-efficient foundation for jumpstarting designs, Texas Instruments announced its enhanced floating-point F28335 Delfino™ microcontroller (MCU) Peripheral Explorer Kit and free C2000 MCU Teaching ROM.
Whitepaper: COM Express COM.0 Revision 2.0
PICMG® adopts new specification for COM Express™ modules. What is new?
National Semiconductor’s WEBENCH LED Architect Simplifies and Speeds Lighting Design
National Semiconductor Corp. today announced the addition of WEBENCH LED Architect to its award-winning portfolio of online WEBENCH Designer tools. The first of its kind, WEBENCH LED Architect enables both novice and expert designers to perform real-time comparisons and optimize complex lighting systems for performance, size and cost in minutes.
Tiny M3-F focus module developer's kits now available from stock
New Scale Technologies, Inc. today announced that developer's kits for its miniature M3-F focus module are available for purchase online, shipping from stock. Each kit includes an M3-F module for precision closed-loop lens motion, along with a USB adapter and New Scale Pathway software for easy evaluation and prototyping. Configured for I2C or SPI serial interface, the modules in the developer's kits accommodate M12 or smaller lenses and image sensors up to 17 x 17 mm.
ITTIA unveiled DB version 3.2
ITTIA, a global supplier of embedded database software, today unveiled the version 3.2 release of its leading edge relational database, ITTIA DB SQL, for application developers of embedded systems and devices. This release introduces transaction savepoints and two new ways to share data on a device, with support for shared memory communications and a low-overhead storage-level locking model.
New Version of EPLAN Electric P8
EPLAN's new version of Electric P8 2.0 software offers practical potential whether for enhanced project reliability, functionality and speed point wiring and active device protection or for channel oriented PLC design. The quality of all documentation is guaranteed by active check functions and the system automatically prevents incorrect data from being entered.
Synopsys DesignWare SATA IP enables first-pass silicon success for Global Unichip Corporation
Synopsys announced that Global Unichip Corporation (GUC) has achieved first-pass silicon success for its GP5080 Solid State Drive (SSD) system-on-chip (SoC) utilising the complete Synopsys DesignWare(r) SATA IP solution, consisting of controller, PHY and verification IP. GUC, a leading full-service SoC design foundry, determined that Synopsys' DesignWare SATA IP was superior in quality, power consumption, performance and feature set. SATA interoperability was a key requirement for GUC, and Synopsys was the only provider to offer an integrated solution consisting of a controller and PHY IP that has passed the SATA International Organization (SATA-IO) Building Block interoperability testing, an independent demonstration of full SATA functionality. By integrating Synopsys' DesignWare SATA IP solution into GUC's SSD SoC Platform, GUC was able to focus their internal expertise on delivering their SSD SoC platform within an aggressive six-month development time-to-market window.
Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology
Synopsys announced immediate availability of the DesignWare MIPI M-PHY® IP for next-generation high-speed interfaces based on the newly ratified MIPI® Alliance M-PHY specification. With this latest addition to the DesignWare MIPI IP portfolio, Synopsys is the first provider to offer a comprehensive solution of a controller and PHY IP for both the MIPI DigRF(SM) v3 (2.5G/3.0G) and v4 (4G) standards. Incorporating both standards in a mobile device brings the benefit of the faster 4G standards while preserving broad coverage by using 2.5G/3.0G as a fallback mode.
Magma - Quartz iPOP Initiative – Delivers “improved Productivity, Operability and Performance” for Faster, Higher Capacity Physical Verification
Magma Design Automation today launched Quartz iPOP, the "improved Productivity, Operability and Performance" initiative to facilitate designers' adoption of the Quartz™ DRC and Quartz LVS software for designs targeted at 65 nanometers (nm) and below. Magma's Quartz products, the first truly scalable physical verification solutions, handle larger designs and provide turnaround time up to an order of magnitude faster than traditional solutions – without sacrificing accuracy or requiring additional hardware. These unique capabilities provide the improved productivity and performance necessary to cope with the higher verification burden for designs at 65 nm and smaller without increasing the physical verification budget.
Magma’s Titan Qualified for TowerJazz Reference Flow
Magma Design Automation today announced TowerJazz, the global specialty foundry leader, has qualified the Titan™ Mixed-Signal Design Platform for TowerJazz's Power Management Analog/Mixed-Signal (AMS) Reference Flow and process design kits (iPDKs) for its 180-nanometer (nm) technologies. Magma's Titan software and TowerJazz's foundry technology provide mutual customers with a comprehensive design and manufacturing solution that enables users to accelerate the design-to-silicon process and achieve first-time silicon success.
CST - Technical Webinar Series on Electromagnetic System
Computer Simulation Technology (CST) announces a major new webinar series focusing on today's most challenging 3D Electromagnetic problems in RF system design, EMC, and signal integrity. Current electronic devices can include multiple antennas, very high data rate circuitry, high density IC packages, and strict federal requirements on emissions and susceptibility. Larger systems incorporating many electronic circuits, face problems of interoperability, cable harness interference, behavior of novel materials, and lightning protection. Devices and systems can range in size by several orders of magnitude.
Agilent Technologies Introduces IC-CAP WaferPro Software for Automating Complex Device Modeling Applications
Agilent Technologies Inc. today announced Integrated Circuit Characterization and Analysis Program (IC-CAP) Wafer Professional (WaferPro) software. The new software provides a multi-site, multi-wafer, automated DC and RF measurement solution for semiconductor device modeling applications.
National Instruments UK & Ireland To Present LabVIEW Developer Days
Taking place in eight locations around the UK and Ireland, the National Instruments LabVIEW Developer Day offers free introductory and advanced technical sessions designed to help engineers and scientists improve product skills, knowledge and productivity using the award-winning LabVIEW graphical programming software.
ChipWrights Stacks Linux Application Development Kit with Major Enhancements for IPTV Set-Top Boxes and IP Cameras
ChipWrights, Inc New Linux® Application Development Kit for the CW5631 System-on-Chip provides the components to develop low-cost IPTV set-top boxes and IP cameras and significantly improve time to market. The Kit—based on the OpenEmbedded build system—leverages thousands of open source packages.
Reducing Switching Power with Intelligent Clock Gating
Xilinx introduces the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30 percent for Virtex®-6 and Spartan®-6 FPGA designs
Partial Reconfiguration of Virtex FPGAs in ISE 12
This white paper addresses the flexible partial reconfiguration options when designing with Virtex®-6, Virtex-5, and Virtex-4 FPGAs.
AMD Unlocks 3D Internet Potential with OpenGL ES 2.0 Driver
At SIGGRAPH 2010, AMD today announced availability of the first software driver for desktop computing environments to support the WebGL industry standard, which is designed to bring plugin-free 3D graphics to the Internet. The AMD OpenGL® ES 2.0 driver is intended to help developers easily create exciting 3D content that can be rendered more quickly for consumers using open-source web browsers, thereby helping create an application-like browser experience.
AMD Spurs Software Development to Benefit from Heterogeneous Compute Architectures and APUs
AMD today announced the availability of the ATI Stream Software Development Kit (SDK) v2.2 with full OpenCL™ 1.1 support to provide developers with the tools they need to build incredible next-generation applications. By taking advantage of both CPU and GPU processing power in a given system, applications like 3D video, HD video chat and multi-display 3D gaming are possible.
Synopsys Launches DesignWare USB Software Alliance Program
Synopsys, Inc. announced the launch of the DesignWare® USB Software Alliance Program with leading USB software providers emsys, Jungo, MCCI and MicroDigital as inaugural members. This alliance program establishes an ecosystem of qualified USB software providers for drivers, firmware and stacks which have proven interoperability with Synopsys' DesignWare USB 2.0 and SuperSpeed USB 3.0 IP. Synopsys and its DesignWare USB Software Alliance Program members can help designers to quickly incorporate USB connectivity into their system-on-chips (SoCs) with less risk and provide consumers with the plug-and-play functionality required for PCs, peripherals, mobile devices and consumer electronic products.
Silicon Labs Offers Comprehensive Symbol Model Library To Accelerate Embedded System Design
Silicon Labs introduced a web-based library of schematic symbols and printed-circuit board (PCB) footprints to help developers designing with Silicon Labs' embedded mixed-signal products streamline application development and accelerate time to market. The online symbol library supports Silicon Labs' latest microcontrollers (MCUs) including the Si10xx wireless MCU family, ultra-low-power F99x/F98x devices and capacitive touch-sense MCUs; USB, Ethernet and LCD interface products; and the Si1102/20 proximity and ambient light sensors.
SchmartBoard to Give Away Development Board for TI Microcontrollers
SchmartBoard has announced a new monthly contest for their new development board which supports Texas Instruments Incorporated's broad microcontroller portfolio, including ultra-low power MSP430, ARM Cortex™-M3-based Stellaris and real-time control C2000 MCU platforms.
UK AEC Industry Makes a Significant Move Towards Building Information Modelling
"The building design, construction and infrastructure industries must improve productivity, while at the same time completing complex projects on time and at or under budget," said Jay Bhatt, senior vice president of AEC Industry Solutions on a recent visit to the UK. He was speaking at a time when a string of big-name contractors and architects including Aedas, WSP, Architype and Halcrow have made investments in Autodesk Revit Software, alongside other products from the Autodesk building information modelling (BIM) portfolio.
Synopsys Adds TDD Support to LTE Model Library
Synopsys, Inc. today announced the availability of the Time Division Duplex (TDD) mode in its Long-term Evolution (LTE) Model Library for physical layer system simulation. The addition of the TDD mode to the proven LTE Model Library enables developers of semiconductors for LTE network equipment and devices to quickly and reliably extend their designs to support this important version of the 3rd Generation Partnership Project (3GPP) LTE standard.
Zuken’s CADSTAR 12.1 PCB Design Software Cuts Engineering Costs
Zuken has today announced version 12.1 of CADSTAR, the desktop PCB design suite. Amidst the call for companies to tighten their belts as they climb out of recession, CADSTAR brings new functionality that helps cut design and manufacturing costs. The CADSTAR team has been focused on making customer's design functionality requirements come true, with new functionality for advanced library management and signal integrity verification, ECAD MCAD integration, and improved high-speed routing – at an accessible, affordable price.
Synopsys and Lattice Renew OEM Relationship for FPGA Synthesis Software
Synopsys, Inc. and Lattice Semiconductor Corporation today announced a multi-year extension of Lattice's OEM agreement for the Synopsys Synplify FPGA synthesis tools, which Lattice has been offering to its customers for more than 10 years. Under the terms of the agreement, Lattice Semiconductor will provide specific versions of Synopsys' Synplify Pro and Synplify software as part of its programmable logic design environments, including the recently announced Lattice Diamond™ FPGA design environment. This agreement ensures continued high-quality, reliable and fast logic synthesis solutions for designers targeting Lattice CPLD and FPGA products.
WaveFormer Lite Generates Mixed Signal HDL Test Benches for all FPGA design flows
WaveFormer Lite Generates Mixed Signal HDL Test Benches for all FPGA design flows SynaptiCAD has just released a major upgrade to WaveFormer Lite, it's entry level tool for generating VHDL and Verilog test benches graphically from timing diagrams drawn by the user. Previously only available as part of the Actel Libero package, WaveFormer Lite can now be purchased directly from SynaptiCAD. WaveFormer Lite generates native VHDL and Verilog testbench code, so it's compatible with all FPGA/ASIC vendors and tool flows without requiring any special runtime engines.
Cadence Aligns Workforce to Deliver on EDA360 Vision
Cadence Design Systems, Inc. announced today that it will align product development to deliver on the EDA360 vision. The company will line up research and development (R&D) around the three core tenets of the vision: System Realization, SoC Realization and Silicon Realization.
New DaVinci 36x videao processors from TI with ARM Cortex A8
Software and hardware engineers can easily design more media-rich, portable applications utilizing the new DaVinci™ DM37x video processors from Texas Instruments Incorporated. The DM3730 and DM3725 with their ARM® Cortex™-A8 and C64x+™ DSP core, imaging and video accelerator (IVA), 3D graphics processor (DM3730 only) and high-performance peripherals (USB 2.0, SD/MMC) integrated on a single system-on-chip (SoC), are suitable for applications requiring HD video processing or a large amount of data processing. These applications include navigation systems, media players, medical patient monitoring devices, industrial test and measurement devices, industrial vision and portable communications.
Actel Releases Windows 7 Compliant Libero IDE
Actel today announced Windows 7 support in Libero Integrated Design Environment (IDE) v9.0 Service Pack 1 and Service Pack 2. These latest releases of Actel's comprehensive software toolset also provide key new features for SmartFusionTM intelligent mixed signal FPGAs and RTAX-DSP FPGAs.
Silicon Labs And Beceem Communications Partner On WiMAX VoIP Gateway Reference Design
Silicon Laboratories Inc. today announced that it has partnered with Beceem Communications to deliver a voice over IP (VoIP) broadband gateway reference design for 4G-WiMAX service providers. The WiMAX VoIP gateway reference design is based on Beceem's recently introduced BCS5350 single-chip WiMAX customer premises equipment (CPE) solution. It also incorporates Silicon Labs' Si32176 ProSLIC devices to provide the interface that enables the use of traditional home telephones for VoIP services over WiMAX.
On-Ramp Wireless Inc. Selects IAR Embedded Workbench to Support Rapid Prototyping and Application Integration
IAR Systems today announced that IAR Embedded Workbench for TI MSP430 device has been selected by On-Ramp Wireless for their latest Ultra-Link Processing(TM) wireless technology.
Lattice Improves Synthesis And Power Optimization In CPL Design Tools
Lattice Semiconductor today announced the immediate availability of Version 1.4 of its ispLEVER® Classic design tool suite. The ispLEVER Classic design software has been upgraded with the addition of Synopsys Synplify Pro with the HDL Analyst feature set, and an improved ispMACH® 4000ZE CPLD fitter with improved power optimization.
Magma’s Quartz Physical Verification Software used by TSMC on Complex 28-nm Product Qualification Vehicle Test Chip – Delivers Sign-off Accuracy along with Required Performance and Capacity
Magma Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, announced today that TSMC used Quartz™ DRC for physical verification of its 28-nanometer (nm) product qualification vehicle (PQV) test chip. PQVs are representative of design data customers will use in production designs. By designing and manufacturing the PQV test chip, TSMC offers its customers greater confidence in achieving silicon success in its 28-nm processes.
Corelis Releases Low Voltage JTAG Adapter for Intel Processors
Corelis has announced the availability of a new active Low Voltage Adapter for compatibility between Corelis' boundary-scan controllers and low voltage JTAG designs operating below 2.5V. The Low Voltage Adapter is rated to support up to 100 MHz TCK speeds, employs ESD protection, and is capable of driving up to 90mA on its outputs.
Xilinx Improves Design Flow for Industry's Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite 12.2
Xilinx announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM (BRAM) power consumption in Virtex(R)-6 FPGA designs. Designers can download ISE(R) Design Suite 12.2 today to take advantage of an easier-to-use, intuitive partial reconfiguration design flow as well as take further steps to reduce power consumption and reduce overall system costs. In addition, a low-cost simulation solution for the embedded design flow is also now available in the latest release of the ISE Design Suite.
Fujitsu Adopts Cadence Encounter Conformal ECO Designer
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Fujitsu Limited has adopted the Cadence® Encounter® Conformal® ECO Designer to cut costs and reduce design time in its engineering change order (ECO) implementation flow. The technology giant recently deployed the Cadence technology to tape out a network-control large-scale integration design of 40 million gates at a 65-nanometer process.
Realtek Semiconductor Selects Cadence Design Systems as its Strategic EDA Solutions Provider
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that it has signed an agreement with Realtek Semiconductor Corp., a leading IC design house in Taiwan, that establishes Cadence as Realtek's strategic electronic design automation (EDA) solutions provider.
